Now showing items 1-2 of 2

    • Kottapalli, Venkateshwar (2017-07-17)
      Cache coherency is crucial to multi-core systems with a shared memory programming model. Coherency protocols have been formally verified at the architectural level with relative ease. However, several subtle issues creep ...
    • Zheng, Qingran (2017-12-08)
      With increasing design complexity and reliability requirements, analog and mixedsignal (AMS) verification manifests itself as a key bottleneck. While formal methods and machine learning have been proposed for AMS verification, ...